EE60100: Mixed Signal Circuits and Systems-on-Chip

Venue: NC233 at Nalanda Class Complex
Class Timings: WED(12:00-12:55) , THURS(11:00-11:55) , FRI(09:00-10:55)
Teaching Assistants (TAs): Anirban Barman (barmananirban10 [AT] gmail [DOT] com) and Dipak Bhapkar (dbhapkar23 [AT] gmail [DOT] com)
References:
[1] Design of Analog CMOS Integrated Circuits by Bezad Razavi, Tata McGraw-Hill
[2] CMOS Analog Circuit Design by Allen and Holberg, Oxford Indian Edition
[3] Analog Integrated Circuit Design, (Second Edition) by Tony Chan Carusone, David Johns, Kenneth Martin, Wiley
[4] Nanoelectronic Mixed-Signal System Design, by Saraju P. Mohanty, McGraw-Hill
[5] System-On-A-Chip: Design and Test, by Rochit Rajsuman, Artech House Signal Processing Library
[6] CMOS VLSI Design, A Circuits and Systems Perspective, (Fourth Edition) by N. H. E. Weste and D. M. Haris, Pearson
    Class-1: Introduction to mixed signal circuits and systems
    Class-2: Tutorial on Cadence tool
    Module-1: Revision of CMOS basics
    Class-3: V-I characteristics and different regions of operation, small signal parameters [1]
    Class-4: Parasitic capacitances of MOS, complete small signal model [1]
    Class-5: Common source amplifiers [1]
    Class-6: Common drain amplifier, common gate amplifier, Current mirror [1]
    Class-7: Cascoded current mirror [1]
    Class-8: Tutorial Problems
    Module-2: Differntial Amplifier
    Class-9: Develovement of differential amplifier with resistive load [1]
    Class-10: Large signal response, Common mode response [1]
    Class-11: Differential gain, design trade-offs [1]
    Class-12: Differential amplifier with current-mirror load, differential gain and common-mode gain, design trade-offs [1]
    Class-13: Tutorial on Cadence tool Home Assignment-1
    Class-14: Tutorial Problems
    Module-3: Comparators
    Class-15: Comparator basics, static and dynamic characteristics of comparators [2]
    Class-16: Two stage comparator [2]
    Class-17: Push/Pull output stage/OTA comparator [2]
    Class-18: Wide-swing current mirror to enhance output impedance, Push/Pull output stage comparator with enhanced gain [2]
    Class-19: Comparator with driving high capacitive load and its delay and slewing performance [2]
    Class-20: Autozeroing Technique and its implementation [2]
    Class-21: Hysteretic Comparator [2]
    Class-22: Rail-to-rail Comparator Link
    Class-23: Tutorial Problems, Home Assignment-2
    Module-4: Physical/Layout Design
    Class-24: Layout of MOS transistor and different layers, Layout of digital gates [2]
    Class-25: Layout of analog circuits, concept of matching [2]
    Class-26: Common centriod layout, use of dummy transistors, metal routing [2]
    Class-27: Tutorial on Cadence: Layout example: digital and analog block
    Class-28: Layout of capacitor and resistor [2], Tutorial Problem
    Module-5: Operational Amplifiers
    Class-29: Specifications of op-amps [2], Single-stage op-amps, Telescopic/cascode op-amp [1]
    Class-30: Two-stage uncompensated op-amp [2], Miller theorem [1]
    Class-31: Frequency compensation [2]
    Class-32: Frequency compensation [2]
    Class-33: Controlling RHP zero [2]
    Class-34: Design steps of two-stage op-amp [2]
    Class-35: Tutorial Problem
    Class-36: Cadence Tutorial
    Video Lectures (Links are shared through email)
    Module-6: Essential Elements of Mixed-Signal System
    Mostly covered in the prerequisite course on Analog Signal Processing. Here, we will learn few implementation examples
    Class-37: Key specifications and implementation of ADC and DAC [2, 4]
    Class-38: Type-II/Charge-pump based phase locked loop [1, 4]
    Class-39: Dynamics modelling of CPPLL [1, 4]
    Class-40: Implementation of Voltage Controlled Oscillator, Key specifications [1, 4]
    Module-7: Memory in Analog Mixed-Signal System-on-Chips (AMS-SoCs)
    Class-41: Memory hierarchy in a computing system, classifications of memory, SRAM array architecture [4]
    Class-42: SRAM cells, read, write and cell stability [4,6]
    Class-43: Sense Amplifier, DRAM array architecture [4,6]
    Class-44: DRAM cell, write and read operation, ROM architecture [4,6]
    Class-45: PROM, EPROM, EEPROM [6]
    Class-46: Flash memory, NAND Architecture, erase, write and read operation [6]
    Module-8: Analog Mixed-Signal System-on-Chips (AMS-SoCs) Design
    Class-47: Example of an emerging AMS-SoC, essential components and challenges in design [4]
    Class-48: Analog circuit design flow, Digital circuit design flow, Concurrent mixed-signal circuit design flow [4]
    Class-49: SoC design, classifications of SoC, classification of different cores, Hardware-software co-design [5]
    Class-50: General guidelines for design reuse in SoC [5], chip packaging options [6], Summary