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Welcome to the homepage of Low Power VLSI Research Group at IIT Kharagpur.

Our group investigates techniques in the field of low power VLSI designs. Our research work includes, but is not limited to, power optimization at all levels of design hierarchy, yield optimization, sensor networks and ASIC design. The group is being headed by Prof. Ajit Pal.

Contact Information:

Prof. Ajit Pal
Department of Computer Science & Engineering
Indian Institute of Technology Kharagpur
Kharagpur INDIA 721302

E-mail: apal@cse.iitkgp.ernet.in
Phone: +91-9434027519 (M), +91-(3222)-283486(O)
Fax: +91-(3222)-255303/255239