Recent Publications:
2014
Early Time Budgeting for Component-Based Embedded Control Systems (Book Chapter),
Manoj Dixit, S. Ramesh and Pallab Dasgupta.
Book Title: Embedded Systems Development: From functional models to implementations.
Editors: A. S-Vincentelli, H. Zeng, M.Di-Natale and P.Marwedel.
Publisher: Springer, 2014 (Electronically available).
2013
Ordered Solution Generation for Implicit AND/OR Search Spaces,
Priyankar Ghosh, P. P. Chakrabarti, Pallab Dasgupta.
Accpeted for Publication in PReMI, 2013.
Algorithms for Generating Ordered Solutions for Explicit AND/OR Structures: Extended Abstract,
Priyankar Ghosh, Amit Sharma, P. P. Chakrabarti, Pallab Dasgupta.
In 23rd International Joint Conference on Artificial Intelligence (IJCAI), pp. 3156-3160, 2013.
Counterexample Ranking Using Mined Invariants,
Srobona Mitra, Ansuman Banerjee, Pallab Dasgupta and Harish Kumar.
Accepted for publication in
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Sytems (TCAD), 2013.
A Fuzzy Real-Time Temporal Logic,
Subhankar Mukherjee and Pallab Dasgupta.
Accepted for publication in
International Journal of Approximate Reasoning (Elsevier), 2013.
An Integrated Approach for Fine-Grained Power and Temperature Management During High-level Synthesis,
Rajdeep Mukherjee, Priyankar Ghosh, Pallab Dasgupta and Ajit Pal.
Accepted for publication in
Journal of Low Power Electronics (JOLPE), 2013.
POWER-TRUCTOR: An Integrated Tool Flow for Formal Verification and Coverage of Architectural Power Intent,
Aritra Hazra, Rajdeep Mukherjee, Pallab Dasgupta, Ajit Pal, Kevin Harer, Ansuman Banerjee and Subhankar Mukherjee.
In
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 32, no. 11, pp. 1801-1813, 2013.
Handling Fault Detection Latencies in Automata-based Scheduling for Embedded Control Software,
Santhosh Prabhu M, Aritra Hazra, Pallab Dasgupta and P. P. Chakrabarti.
In
IEEE Multi-Conference on Systems and Control (MSC), pp. 1-6, August 2013.
Reliability Guarantees in Automata Based Scheduling for Embedded Control Software,
Santhosh Prabhu M, Aritra Hazra and Pallab Dasgupta.
In
IEEE Embedded Systems Letters (ESL), vol. 5, no. 2, pp. 17-20, 2013.
Formal Guarantees for Localized Bug Fixes,
Srobona Mitra, Ansuman Banerjee, Pallab Dasgupta, Priyankar Ghosh and Harish Kumar.
Accepted for publication in
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2013.
Formal Methods for Early Analysis of Functional Reliability in Component-Based Embedded Applications,
Aritra Hazra, Priyankar Ghosh, Satya Gautam Vadlamudi, P. P. Chakrabarti and Pallab Dasgupta.
In
IEEE Embedded Systems Letters (ESL), vol. 5, no. 1, pp. 8-11, 2013.
Debugging Assertion Failures in Software Controllers using a Reference Model,
Kajori Banerjee, Santhosh Prabhu M and Pallab Dasgupta.
Accepted for publication in
6th India Software Engineering Conference (ISEC), 2013.
Model Checking of Global Power Management Strategies in Software with Temporal Logic Properties,
Rajdeep Mukherjee, Subhankar Mukherjee and Pallab Dasgupta.
Accepted for publication in
6th India Software Engineering Conference (ISEC), 2013.
Time-Budgeting: A Component Based Development Methodology for Real-time Embedded Systems,
Manoj Dixit, S.Ramesh and Pallab Dasgupta.
Accepted for publication in
Formal Aspects of Computing (FAOC), Springer, 2013.
Model Checking Controllers with Predicate Inputs,
Santhosh Prabhu M and Pallab Dasgupta.
In
International Conference on VLSI Design (VLSID), 2013.
Formal Verification of Hardware/Software Power Management Strategies,
Rajdeep Mukherjee, Pallab Dasgupta, Ajit Pal and Subhankar Mukherjee.
In
International Conference on VLSI Design (VLSID), 2013.
Formal Verification of Architectural
Power Intent,
Aritra Hazra, Sahil Goyal, Pallab Dasgupta and Ajit Pal.
In IEEE
Transaction on VLSI Systems (TVLSI), vol. 21, no. 3, pp. 78-91, January 2013.
2012
Multi-Objective Low-power CDFG Scheduling using Fine-Grained DVS Architecture in Distributed Framework,
Rajdeep Mukherjee, Priyankar Ghosh, Neerati Sravan Kumar, Pallab Dasgupta and Ajit Pal.
In
International Symposium on Electronic System Design (ISED), 2012.
A Multi-Objective Perspective for Operator Scheduling using Fine-Grained DVS Architectures,
Rajdeep Mukherjee, Priyankar Ghosh, Pallab Dasgupta and Ajit Pal.
In
International journal of VLSI design and Communication Systems (VLSICS), 2012.
Anytime Algorithms for Biobjective Heuristic Search,
Priyankar Ghosh, P. P. Chakrabarti and Pallab Dasgupta.
In
the 25th Australasian Joint Conference on Artificial Intelligence, December 2012.
Planning with Action Prioritization and new Benchmarks for Classical Planning,
Kamalesh Ghosh, Pallab Dasgupta and S. Ramesh.
In
the 25th Australasian Joint Conference on Artificial Intelligence, December 2012.
A Generalized Theory for Formal Assertion Coverage,
Sourasis Das, Ansuman Banerjee and Pallab Dasgupta.
In the IEEE Asian Test Symposium (ATS), 2012.
Reliability Annotations to Formal Specifications of Context-Sensitive Safety Properties in Embedded Systems,
Aritra Hazra, Priyankar Ghosh and Pallab Dasgupta.
In
the Forum on Specification and Design Languages (FDL), September 2012.
Computing Minimal Debugging Windows in Failure Traces of AMS Assertions,
Subhankar Mukherjee and Pallab Dasgupta.
In
Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 31, no. 11, pp. 1776-1780, November 2012.
Synchronizing AMS Assertions with AMS Simulation: From Theory to Practice,
Subhankar Mukherjee, Pallab Dasgupta, Siddhartha Mukhopadhyay,
Scott Little, John Havlicek and Srikanth Chandrasekaran.
Accepted for publication in
Transactions on Design Automation of Electronic Systems (TODAES).
Cohesive Coverage Management: Simulation Meets Formal Methods,
Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta
and P. P. Chakrabarti.
In
the Journal of Electronic Testing: Theory and Applications (JETTA), vol. 28, no. 4, pp. 449-468, 2012.
Execution Ordering in AND/OR Graphs with Failure Probabilities,
Priyankar Ghosh, P. P. Chakrabarti and Pallab Dasgupta.
In
the 5th Annual Symposium on Combinatorial Search (SOCS), July 2012.
Operator Scheduling Revisited : A Multi-Objective Perspective for Fine-Grained DVS Architecture,
Rajdeep Mukherjee, Priyankar Ghosh, Pallab Dasgupta
and Ajit Pal.
In
the 2nd International Conference on Advances in Computing and Information Technology (ACITY), pp. 633-648, 2012.
Workload Driven Power Domain Partitioning,
Arun Dobriyal, Rahul Gonnabattula, Pallab Dasgupta
and Chittaranjan Mandal.
In
VLSI Design and Test (VDAT) Conference, pp. 147-155, 2012.
Assertion Aware Sampling Refinement: A Mixed-Signal Perspective,
Subhankar Mukherjee and Pallab Dasgupta.
In
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 31, no. 11, pp. 1772-1775, November 2012.
Post-Silicon Debugging of PMU Integration Errors using Behavioral Models,
Antara Ain, Subhankar Mukherjee, Pallab Dasgupta
and Siddhartha Mukhopadhyay.
Accepted for publication in
Integration, the VLSI Journal.
Algorithms for Generating Ordered Solutions for Explicit AND/OR Structures,
Priyankar Ghosh, Amit Sharma, P.P. Chakrabarti and Pallab Dasgupta.
In
the Journal of Artificial Intelligence Research (JAIR), vol. 44, pp. 275-333, 2012.
Symbolic Event Propagation Based Minimal Test
Set Generation for Robust Path Delay Faults,
Arijit
Mondal, P.P. Chakrabarti, Pallab Dasgupta.
Accepted for publication in
ACM Transactions on Design Automation of
Electronic Systems (TODAES).
POWER-SIM : An SOC Simulator for
Estimating Power Profiles of Mobile Workloads,
Priyankar Ghosh, Aritra Hazra, Rahul
Gonnabhaktula, Niraj Bhilegaonkar, Pallab Dasgupta, Chittaranjan Mandal and
Krishna Paul.
In
the Journal of Low-Power Electronics (JOLPE), vol. 8, no. 3, pp. 293-303, 2012.
Formal Methods for Ranking
Counterexamples Through Assumption
Mining,
Srobona Mitra, Ansuman Banerjee and Pallab
Dasgupta.
In Design Automation and Test in Europe (DATE), pp. 911-916, March 2012.
A dynamic assertion-based verification
platform for validation of UML designs,
Ansuman Banerjee, Sayak Ray, Pallab Dasgupta, P. P. Chakrabarti, S. Ramesh, P. Vignesh and V. Ganesan.
In ACM SIGSOFT Software Engineering Notes, vol. 37, no. 1, pp. 1-14, 2012.
Early Analysis of Critical Faults: An Approach to Test
Generation from Formal Specifications,
Sourasis Das, Ansuman Banerjee and Pallab Dasgupta.
In IEEE Transaction on CAD (TCAD), vol. 31, no. 3, pp. 447-451, March 2012.
Formal Methods for Coverage Analysis of
Architectural Power States in Power-Managed Designs,
Aritra Hazra, Pallab Dasgupta, Ansuman Banerjee and Kevin Harer.
In Proceedings of 17th Asia
and South Pacific Design Automation Conference (ASP-DAC), pp. 585-590, January 2012.
Verification by parts: Reusing Component Invariant Checking Results,
Srobona Mitra, Priyankar Ghosh and Pallab Dasgupta,
In IET
Computers & Digital Techniques Journal, vol. 6, iss. 1, pp. 19-32, January 2012.
A Library for Passive Online Verification
of Analog and Mixed-Signal Circuits,
Debjit Pal, Pallab Dasgupta and Siddhartha Mukhopadhyay.
In the
proceedings of IEEE VLSI Design Conference, pp. 364-369, January 2012.
2011
POWER-SIM : An SOC
Simulator for Estimating Power Profiles of Mobile Workloads,
Priyankar Ghosh, Aritra Hazra, Niraj Bhilegaonkar, Pallab Dasgupta,
Chittaranjan Mandal and Krishna Paul,
In the International Symposium
on Electronic System Design (ISED), pp.273-278,
December 2011.
Backward Reasoning with Formal Properties: A Methodology for Bug Isolation on
Simulation Traces,
Anvesh Komuravelli, Srobona Mitra, Ansuman Banerjee and Pallab Dasgupta,
In Proceedings of Asian
Test Symposium (ATS), pp. 238-243, November 2011.
Some Results on Parametric Temporal Logic,
Manoj Dixit, S. Ramesh and Pallab Dasgupta,
In
Information Processing Letters 111 (Elsevier), pages - 994-998, 2011.
Auxiliary Specifications for Context-Sensitive Monitoring of AMS Assertions,
Subhankar Mukherjee, Pallab Dasgupta and Siddhartha Mukhopadhyay,
In
IEEE Transactions on CAD (TCAD), vol. - 30, issue - 10, pp. 1446-1457, 2011.
SAT based Timing Analysis for Fixed and Rise/Fall Gate Delay Models,
Suchismita Roy, Pallab Dasgupta and P. P. Chakrabarti,
Accepted for publication in
Integration the VLSI Journal, 2011.
Chassis: A Platform for Verifying PMU Integration Using Auto-generated
Behavioral Models,
Antara Ain, Debjit Pal, Pallab Dasgupta, Siddhartha Mukhopadhyay, Rajdeep
Mukhopadhyay and John Gough
In ACM Transactions on Design
Automation of Electronic Systems (TODAES),
Article-33, Volume-16, Issue-3, June 2011.
Auxiliary State Machines and Auxiliary Functions: Constructs for Extending AMS
Assertions,
Subhankar Mukherjee and Pallab Dasgupta.
In the
proceedings of VLSI Design Conference 2011.
2010
Policy Based Security Analysis in Enterprise Networks -A Formal Approach,
Padmalochan Bera, S K Ghosh and Pallab Dasgupta.
In IEEE Transactions on
Network and Service Management, 2010.
A WLAN security Management Framework based on Formal Spatio-Temporal RBAC
Model,
Padmalochan Bera, S K Ghosh and Pallab Dasgupta.
In the
Journal of Security and Communication Networks, Wiley Interscience, 2010.
A Formal Method for Detecting Semantic Conflicts in Protocols between Services
with Different Ontologies,
Priyankar Ghosh and Pallab Dasgupta.
In the
International Conference on Web & Semantic Technology (WeST), 2010.
Integrated Security Analysis Framework for an Enterprise Network-A Formal
Approach,
Padmalochan Bera, S K Ghosh and Pallab Dasgupta.
In the
Journal of IET Information Security, 2010.
A Query based formal security analysis framework for enterprise LAN,
Padmalochan Bera, Soumya
Maity, S K Ghosh and Pallab Dasgupta.
In the
Proceedings of 10th International Conference on Computer and Information
Technology 2010 (CIT 2010), June 2010.
Bounded Delay Timing Analysis and Power Estimation using SAT,
Suchismita
Roy,
P.P. Chakrabarti and P. Dasgupta.
Accepted for Publication in the
Transaction of Microelectronics Journal (Elsevier) 2010.
Leveraging UPF-Extracted Assertions for Modeling and Formal Verification of
Architectural Power Intent,
Aritra Hazra, Srobona Mitra, Pallab Dasgupta, Ajit Pal, Debabrata Bagchi and
Kaustav Guha.
In the
Proceedings of Design Automation Conference (DAC), June 2010.
Auto-Generation of AMS Behavioral Models in Different Languages from Hybrid
Automata,
Antara Ain and Pallab Dasgupta.
In the
Proceedings of IEEE TechSym, April 2010.
A Study of Modeling Techniques in use in Digital and Mixed-Signal Domains for
Semi-Formal Verification,
Srobona Mitra, Antara Ain, Priyankar Ghosh and Pallab Dasgupta.
In the
Proceedings of IEEE TechSym, April 2010.
A Spatio-temporal Role-based Access Control Model for Wireless LAN Security
Policy Management,
Padmalochan Bera, Pallab Dasgupta,
S. K. Ghosh.
In the
Proceedings of 4th International Conference on Information Systems, Technology
and Management (ICISTM-10), March 2010.
Taming the Component Timing: A CBD Methodology for Real-time Embedded Systems,
Manoj Dixit, S Ramesh and Pallab Dasgupta.
In the
proceedings of DATE 2010.
Accelerating Synchronous Sequential Circuits using an Adaptive Clock,
Arijit Mondal, P. P. Chakrabarti, Pallab Dasgupta.
In the
proceedings of VLSI Design Conference 2010.
Coverage Management with Inline Assertions
and Formal Test Points,
Aritra Hazra,
Priyankar Ghosh, Pallab Dasgupta, P. P. Chakrabarti.
In the
proceedings of VLSI Design Conference 2010. Awarded as the
BEST STUDENT PAPER
2009
Incremental Verification Techniques for an
Updated Architectural Specification,
Srobona Mitra,
Priyankar Ghosh, Pallab Dasgupta, P. P. Chakrabarti.
In INDICON Conference, December 2009.
A Novel Methodology to Assist Client Side
Testing of Interactive Web Applications,
Priyankar Ghosh, Srobona Mitra, Pallab Dasgupta.
In
International Conference on Information Technology (ICIT), December 2009.
Formal Verification of Security Policy
Implementations in Enterprise Networks,
Padmalochan Bera, Pallab Dasgupta,
S. K. Ghosh.
In the 5th
International Conference of Information System Security (ICISS),
December 2009.
Fault Analysis of Security Policy
Implementations in Enterprise Networks,
Padmalochan Bera, Pallab Dasgupta,
S. K. Ghosh.
In
International Conference on Networks & Communications (NetCoM), December 2009.
Abstraction Refinement for State Space
Partitioning based on Auxiliary State Machines,
Priyankar Ghosh, B. Ramesh, Ansuman Banerjee, Pallab Dasgupta.
In
IEEE TENCON Conference, November 2009.
Incorporating Local Variables in
Mixed-Signal Assertions,
Subhankar Mukherjee, Pallab Dasgupta.
In
IEEE TENCON Conference, November 2009.
Directed Automated Symbolic Verification Of
Formal Properties With Local Variables,
Sourasis Das, Pallab Dasgupta, Ansuman Banerjee, P. P.
Das.
In
IEEE TENCON Conference, November 2009.
Assertion-Based Verification of Mixed-Signal Behaviors with Sampling Clock,
Subhankar Mukherjee, Subrat K. Panda,
Pallab Dasgupta.
In the proceedings of
SNUG India 2009.
Formal Analysis of Security Policy Implementations in Enterprise Networks,
Padmalochan Bera, Pallab Dasgupta,
S. K. Ghosh.
International Journal of
Computer Networks & Communications (IJCNC), Vol 2(2), pp 56-73, July 2009.
A static verification
approach for architectural integration of mixed-signal integrated circuits ,
Rajdeep Mukhopadhyay, Anvesh Komuravelli, Pallab Dasgupta,
Subrat K. Panda, Siddhartha Mukhopadhyay.
In Transactions of Integration
- the VLSI Journal, Elsevier Pub., May 2009.
A
Formal Approach for Specification-Driven AMS Behavioral Model Generation,
Subhankar Mukherjee, Antara Ain, Subrat K. Panda,
Rajdeep Mukhopadhyay, Pallab Dasgupta.
In the proceedings of
DATE 2009.
A
Verification Framework for Analyzing Security Implementations in an Enterprise
LAN,
Padmalochan Bera, Pallab Dasgupta,
S. K. Ghosh.
In Proceedings of IEEE
International Advance Computing Conference (IACC), 1008-1015, March 2009.
Instrumenting AMS Assertion Verification on Commercial Platforms,
Rajdeep Mukhopadhyay, Subrat K. Panda, Pallab Dasgupta,
John Gough.
In ACM Transactions on
Design Automation of Electronic Systems (TODAES), vol-14, iss-2, 2009.
Design Intent Coverage Revisited,
Arnab Sinha,
Pallab Dasgupta,
Bhaskar Pal, Sayantan Das, Prasenjit Basu,
P. P. Chakrabarti.
In
ACM Transactions on Design Automation of Electronic Systems (TODAES),
vol-14, iss-1, 2009.
Inline Assertions -
Embedding Formal Properties in a Test Bench,
Aritra Hazra,
Priyankar Ghosh, Pallab Dasgupta, P.P. Chakrabarti.
In the proceedings of
VLSI Design Conference 2009.
2008
CheckSpec: A Tool for
Consistency and Coverage analysis of Assertion Specifications,
Ansuman Banerjee, K. Datta, Pallab Dasgupta.
In the proceedings
of ATVA 2008.
A Dynamic Assertion-based
Verification Platform for Validation of UML designs,
Ansuman Banerjee, Sayak Ray, Pallab Dasgupta,
P. P. Chakrabarti, S. Ramesh, P.V.V. Ganesan.
In the proceedings
of ATVA 2008.
Dynamic Assertion-based
Verification Platform for UML Statecharts over Rhapsody,
Ansuman Banerjee, Sayak Ray, Pallab Dasgupta,
P. P. Chakrabarti, S. Ramesh, P.V.V. Ganesan.
In IEEE TENCON 2008.
Auxiliary State Machines +
Context-Triggered Properties in Verification,
Ansuman Banerjee,
Pallab Dasgupta,
P. P. Chakrabarti.
In
ACM Transactions on Design Automation of Electronic Systems (TODAES).
Mode Based Functional Partitioning of Design Intent for Behavioral Modeling of
Large AMS Circuits,
Rajdeep Mukhopadhyay, Antara Ain, S. K. Panda, Pallab Dasgupta, Siddhartha
Mukhopadhyay, John Gough.
In the proceedings of
VLSI Design and Test
Symposium (VDAT) 2008.
Quantified
UML Collaboration Diagrams,
P. Worah, Ansuman Banerjee, P. P. Chakrabarti,
Pallab Dasgupta.
In the proceedings
of
VLSI Design and Test
Symposium (VDAT) 2008.
Cohesive
Coverage Management for Simulation and Formal Property Verification,
Aritra Hazra, Ansuman Banerjee, Srobona Mitra,
Pallab Dasgupta, P. P. Chakrabarti,
C. R. Mohan.
In the proceedings
of ISVLSI'08.
Satisfiability Models for Maximum Transition Power,
Suchismita
Roy,
P.P. Chakrabarti, P. Dasgupta.
IEEE Transactions on VLSI Systems,
Volume 16, Issue 8, Pages: 941-951, August 2008.
Accelerating Assertion Coverage with Adaptive Test-benches,
Bhaskar Pal, Ansuman Banerjee, Arnab Sinha,
Pallab Dasgupta.
IEEE
Transactions on CAD (TCAD), 27(5), Pages:967 - 972, May 2008.
2007
Formal
Assertion based Verification in Industrial Setting,
Raj S. Mitra, Alok Jain, Jason Baumgartner,
Pallab Dasgupta.
Tutorial presented at
DAC'2007.
Statistical
Static Timing Analysis using Symbolic Event Propagation,
Arijit Mondal,
P.P. Chakrabarti, P. Dasgupta.
In Tran. of
IET
Circuits, Device & Systems, vol. 1, no. 4, 283-291.
Hardware
Accelerated Constrained Random Test Generation,
Bhaskar Pal, Arnab Sinha, P. Dasgupta,
P.P. Chakrabarti, Kaushik De.
In Tran. of IET
Computers and Digital Techniques, vol. 1, no. 4, 423-433.
A New Pseudo-Boolean Satisfiability based approach to Power Mode Schedulability Analysis,
Sayak Ray, P. Dasgupta,
P.P. Chakrabarti.
In
the proceedings of VLSID 2007.
Bounded Delay Timing Analysis Using Boolean
Satisfiability,
Suchismita Roy, P. Dasgupta,
P.P. Chakrabarti.
In
the proceedings of VLSID 2007.
Can Semi-Formal be made
more Formal ?
A. Banerjee, P. Dasgupta,
P.P. Chakrabarti.
In Proceedings of GMISL 2007.
Timing analysis of sequential circuits using symbolic event propagation.
Arijit Mondal, P.Dasgupta,
P.P. Chakrabarti.
In Proc. of International Conference on Computing: Theory and
Applications, Platinum Jubilee conference of ISI Kolkata, 2007.
Event propagation for
accurate circuit delay calculation using SAT.
Suchismita Roy, P. Dasgupta,
P.P. Chakrabarti.
In ACM Trans. Des. Autom. Electron. Syst.(TODAES)
vol. 12, no. 3, August 2007 (Article - 36).
2006
Reasoning about
timing behavior of digital circuits using symbolic event propagation and
temporal logic
Arijit Mondal, P.P. Chakrabarti,
In IEEE Transactions on CAD (TCAD)
25(9): 1793-1814.
Test
Generation Games from Formal Specifications.
A. Banerjee, B.Pal, S. Das, A. Kumar, P. Dasgupta.
In the proceedings of DAC 2006.
Design Intent Coverage - A new paradigm for Formal Property Verification.
P. Basu, S. Das, A. Banerjee, P. Dasgupta, P.P. Chakrabarti, C.R. Mohan, L.
Fix, R. Armoni.
In IEEE Transactions on CAD (TCAD), 25(10), 1922-1934.
Discovering the Input Assumptions in Specification Refinement Coverage.
P. Basu, S. Das, P. Dasgupta, P.P. Chakrabarti.
In Proc. of ASPDAC, 2006.
What lies between Design Intent Coverage and Model Checking?
S. Das, P. Basu, P. Dasgupta, P.P. Chakrabarti.
In Proc. of DATE, 2006.
Synthesis of System Verilog Assertions.
S. Das, R. Mohanty, P. Dasgupta, P.P. Chakrabarti.
In Proc. of DATE, 2006.
Instruction-Set-Extension Exploration using Decomposable Heuristic Search.
Samik. Das, P.P. Chakrabarti, P. Dasgupta.
In Proc. of VLSI, 2006.
A
Debugging Utility for Assertion-based Protocol Verification.
B.Pal, A.Nandi, P.Dasgupta, P.P. Chakrabarti.
In Proc. of EAIT,
2006.
Exact method for estimating Expected Settling
Power in Sequential Circuits.
D. Chakraborty,
P.P. Chakrabarti, P.Dasgupta.
In Proc. of VDAT, 2006.
Automatic Test Generation for Temporal Coverage Points using a Stochastic Tree
Model.
A. Nandi, B.Pal, P.Dasgupta, P.P. Chakrabarti.
In Proc. of VDAT, 2006.
Detecting faults at the time they occur.
A. Kumar, S. Das,
P.Dasgupta, P.P. Chakrabarti.
In Proc. of VDAT, 2006.
Property Driven Test Generation in Absence of Direct
Interface.
Bhaskar Pal,
P. Dasgupta, Partha P. Chakrabarti.
In Proc. of IEEE INDICON
2006, New Delhi, India.
A framework for estimating peak power in gate-level
circuits.
D.Chakraborty,
P.P. Chakrabarti, A. Mondal, and P.Dasgupta.
In International
workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS),
Montpellier, France, 2006.
Formal
Verification of Power Scheduling Policies for Battery Powered Mobile Systems.
Sayak Ray,
P.Dasgupta, P.P. Chakrabarti.
In Proc. of IEEE INDICON 2006, Sept. 15-17,
2006, New Delhi, India.
2005
A Systematic framework for
Validation and Debugging of Pipelined Simulators.
A. Roy, S.K. Panda, R. Kumar, P.P. Chakrabarti.
In ACM Tran. On Design Automation and Embedded Systems (TODAES),
vol. 10, No. 3, July 2005, 462-491.
The Open Family of
Temporal Logics: Annotating Temporal Operators with Input Constraints.
A. Banerjee and P. Dasgupta.
In ACM Tran. On Design Automation and Embedded Systems (TODAES),
vol. 10, No. 3, July 2005, 492-522.
SAT based solutions for Consistency Problems in Formal Property Specifications
for Open Systems.
S. Roy,
S. Das, P. Basu, P. Dasgupta, P.P. Chakrabarti.
In Proceedings of ICCAD, 2005.
H-DBUG: A High-level
Debugging Framework for Protocol Verification using Assertions.
A.
Nandi, B. Pal, N. Chhetan, P. Dasgupta, P.P. Chakrabarti.
In Proceedings of INDICON, 2005.
Interactive Test-Bench
Synthesis for Assertion-Based Verification.
A.
Banerjee, S. Chacrovorty, B. Pal, P. Dasgupta.
In Proceedings of INDICON, 2005.
Test
Plan Coverage
by Formal Property Verification.
P. Basu,
S. Das, A. Banerjee, P. Dasgupta, P.P. Chakrabarti.
In Proceedings of VDAT, 2005.
Syntax-driven Approximate
Coverage Analysis for an Assertion Suite against a High-Level Fault Model.
S. Das,
P. Basu, P. Dasgupta, P.P. Chakrabarti.
In Proceedings of VDAT, 2005.
Bounded Model Checking for
OpenLTL.
S.
Roy, P. Dasgupta, P.P. Chakrabarti.
In Proceedings of VDAT, 2005.
Scoreboard Directed Dynamic Constraint Modification for Higher Simulation
Coverage.
B. Pal, A. Nandi, S. Ray, A. Banerjee, P. Dasgupta, P.P. Chakrabarti.
In Proceedings of SNUG, 2005.
Syntactic Transformation of
Assume-Guarantee Assertions: From Sub-modules to Modules.
P. Basu, P. Dasgupta, P.P. Chakrabarti.
In Proceedings of VLSI, 2005.