VLSI SYSTEM DESIGN SYLLABUS

INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR

COMPUTER SCIENCE AND ENGINEERING DEPARTMENT  

AUTUMN SEMESTER 2004

VLSI SYSTEM DESIGN

Subject No. CS 60053/CS 40015                                                              L – T- P (3-1-0)

Detailed Syllabus:

1. Introduction to Digital Integrated Circuit Design

• Bipolar and MOS Transistors
• Design Abstraction Levels
• Quality Metrics of a Digital Design

             *Voltage Transfer Characteristics

 *Noise Margins

 *Fan-In and  Fan-Out

 *Propagation Delays

             * Power Consumption

2. Devices

• Diode
• MOS Transistors

*Threshold Voltage

*VI Characteristics and Equations

*Channel Length Modulation

* MOS Transistor Capacitances

* SPICE Models

*MOS Transistor Switches

• CMOS Inverter

*DC Characteristics

*NOISE Margins

*Capacitance and Propagation Delay

*Transistor Sizing

•  Pseudo-nMOS Inverter
•  Transmission Gate

·         Silicon wafer, photolithography

·         Diffusion and Ion Implantation

·         n-well, p-well and twin-tub process

·         CMOS Process flow

·         Metal and Polysilicon Interconnect

·         Wires and Vias

·         Tub ties and Latch up

·         Stick Diagram

·         Design Rules

·         Packaging

4. CMOS Logic Design

·         Static Complementary CMOS Design

·         NAND and NOR Gates

·         Pseudo n-MOS Logic

·         Pass Transistor Logic

·         Dynamic CMOS Design

·         Domino Logic

·         Complex Logic Circuits and CMOS Standard Cell Design

·         Logic Synthesis and Optimization Algorithms

·         Logic Simulation – VHDL / VERILOG Description

5.  Sequential Circuits Design

·         Latches and Flop-Flops, Edge Triggered and Master Slave Logic

·         Clocking Strategies – Single phase and Two Phase Clocking

·         Sequential Systems Design - State Transition Diagram/Table, State Assignment and Synthesis.

·         Sequential Machine Synthesis and Optimization Algorithms

·         Shift registers and Counters

6. Subsystem Design

·         Datapath Operators

* Adder

* Parity Generator

* Comparator

* ALU

* Multiplexor

* Multiplier

* Shifter

·         Memory Units

* Read-Only Memories – ROM Cells

*Read/Write Memory  - SRAM  and DRAM Cells

* Address Decoder

* Sense Amplifier

·         Programmable Logic Arrays

7.  High Level Synthesis

·         Design Abstraction

·         Design Description Languages – VHDL/VERILOG

·         Register Transfer Design

·         Data and Control Flow Representations

·         Scheduling and Allocation Algorithms

·         Data and Control Synthesis and Optimization

8. Layout Generation 

·         Partitioning

·         Floor Planning

·         Placement

·         Routing – Global, Channel and Switch box Routing

·         Power and Clock distribution

·         Pad Design

9. CAD Tools

            SPICE  Model and Simulation

            Synthesis, Simulation and Layout Generation tools – Cadence, Synopsys

Note:

CAD Tools will be introduced the Laboratory (Advanced VLSI Laboratory) with  Laboratory  time 3Hrs per week. Students should get familiarized with SPICE, Cadence and Synopsys tools. As part of the course each group of students (two students per group) will have to complete an assignment that will require design, simulation and synthesis of a digital circuit using these tools. The specification of the circuits to be designed will be provided to each group.

Recommended Text:

N. H. E. Weste and K. Eshraghian : Principles of  CMOS VLSI Design : A Systems Perspective, Pearson Education, 2004.

W. Wolf: Modern VLSI Design : Modern VLSI Design: Systems on Silicon, Pearson Education, 2000.

Reference:

1. J. Rabaey, A. Chandrakasan and B. Nikolic: Digital Integrated Circuits:  A Design Perspective, Prentice Hall of India, 2003.

2. M. Sarafzadeh and C. K. Wong:  An Introduction to VLSI Physical Design, MCGraw-Hill International Editions, 1996

3. D. D. Gajaski, N. D. Dutt , A C-H Wu and S Y-L Lin : High-Level Synthesis: Introduction to Chip and System Design, Kluwer Academic Publishers, 1992.